Title: Embedded Floating-Point Units in FPGAs

Speaker: Michael Beauchamp, University of Washington

Date/Time: Monday, February 13, 2006, 10:00 – 11:00 am

Location: Building 980, Room 95 (Sandia NM)

Brief Abstract: Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications.  However, it is this nonspecific nature that has limited the use of FPGAs in scientific applications that require floating-point arithmetic.  Even simple floating-point operations consume a large amount of computational resources.  In this paper, we introduce embedded floating-point multiply-add units in an island style FPGA.  This has shown to have an average area savings of 55.0% and an average increase of 40.7% in clock rate over existing architectures.

CSRI POC: Keith Underwood, (505) 284-9283