Title: Data Streaming Compilers for Multi-core CPU

Speaker: Brent Leback, The Portland Group

Date/Time: Thursday, August 30, 2007; 10:00 a.m. (MT)

Location: JCEL (899), Room 1811 (Sandia NM)

Brief Abstract: Current multi-core processors increase instruction and computational bandwidth linearly, but don't increase data bandwidth from main memory.  Programming models that use multiple cores like an SMP fail to take this limit into account and fail to deliver the promised performance.  Given clock rate constraints, increased performance must come from better core architecture and more efficient use of multiple cores.

PGI is developing a multi-core compiler strategy that leverages compute intensity and data streaming. Treating core-local cache as local memory, and inserting inter-core synchronization, we optimize memory bandwidth usage and minimize cache conflicts.  Each core loads data into local cache, then hands off control of the memory interface.  The core computes at full speed on cache-local data, then stores results the next time it receives control of the memory interface.  Often presented as a new model for computing, the Streaming Model, it's really an incremental modification to classical compiler vectorization.