Title: Modeling Processor Performance Using Monte Carlo Techniques

Speaker: Ramkumar Srinivasan, New Mexico State University

Date/Time: Wednesday, May 23, 2007, 1:30pm – 2:30pm

Location: CSRI Building/Room 90 (Sandia NM)

Brief Abstract: Performance evaluation of modern processors is becoming increasingly difficult because of the lack of proper simulation frameworks. We have developed a Monte Carlo performance prediction methodology for in-order issue architectures and have successfully applied it to model the Itanium-2, Niagara, and CELL processors. These models use application characteristics such as dependence profiles, instruction mix, and microarchitectural characteristics such as cache hit rates to predict performance in a few seconds. Validations indicate that the model predicts performance to within 10% of measurements. Besides accurate performance prediction, the model can be used for design-space exploration to help answer questions such as: "What is is the performance impact of a 2X faster floating-point unit? Is a better branch predictor required?". Also, the model decomposes stalls into its constituents helping the application designer quickly realize microarchitectural bottlenecks. In this talk, we will describe our Monte Carlo Itanium-2/CELL performance model.

CSRI POC: James Ang, (505) 844-0068