Program

Final Report

Agenda

January 9, 2008
Time

Topic

 Speaker

8:15 am – 8:45 am

Welcome and Introduction

 Sudip Dosanjh, SNL

8:45 am – 9:15 am

Problem Motivation

 Richard Murphy, SNL

9:15 am – 10:15 am

Memory Market Drivers

 Dean Klein, Micron

10:15 am – 10:30 am

Break

  

10:30 am – 11:30 am

Memory Tutorial
(Circuits and Packaging)

 Brent Keeth, Micron

11:30 am - 12:00 pm

Alternative Memory Architectures

Glen Rosendale, Nantero

12:00 pm – 1:00 pm

Lunch

  

1:00 pm – 2:30 pm

Systems and CPU Panel

 Chair: Mark Hill, Univ. of Wisconsin
Rich Oehler, AMD
Mike Parker, Cray
Pete Vogt, Intel
Ray McConnell, Clearspeed

2:30 pm – 2:45 pm

Break

  

2:45 pm – 4:00 pm

Breakout Session
Applications
Architecture
Programming Models

 Applications: Jeff Vetter (ORNL), Mike Heroux (SNL), Architecture: Peter Kogge (Notre Dame), Arun Rodrigues (SNL), Programming Models: Mike Merrill (DOD), Bruce Hendrickson (SNL)

4:00 pm – 4:15 pm

Break

  

4:15 pm – 5:00 pm

Breakout Session (continued)

 Applications: Jeff Vetter (ORNL), Mike Heroux (SNL), Architecture: Peter Kogge (Notre Dame), Arun Rodrigues (SNL), Programming Models: Mike Merrill (DOD), Bruce Hendrickson (SNL)

5:00 pm – 5:15 pm

Wrap Up

  


January 10, 2008
Time

Topic

 Speaker

8:15 am – 9:00 am

Breakout Reports

  

9:00 am – 10:00 am

Critique I
Applications critiques Architecture
Architecture critiques PM
PM critiques Applications

  

10:00 am – 10:15 am

Break

  

10:15 am – 11:15 am

Critique II
Applications critiques PM
Architecture critiques Applications
PM critiques Architecture

  

11:15 am – 12:15 pm

Critique Reports

  

12:15 pm – 1:15 pm

Lunch

  

 
KEY QUESTIONS

Systems and CPU Panel

  1. With the move to multicore, how will you restore memory balance?  Or, are we doomed?
  2. What kinds of explicit control should the programmer have over memory and data placement?
  3. Multicore architectures require everybody to program in parallel, what primitives can you suggest to facilitate that change?
  4. What is the limit to the number of cores you will put on a chip?
  5. What would you do (for HPC) with 50 mm2 of Si?  What percent would be processor?  How many cores?
  6. Same as #5 but 200 mm2

Architecture Breakout

  1. How would you make memory smarter?
  2. What is wrong with the other groups? What should they do about it?
  3. How do we deal with existing code?  How do we support applications that current architectures do not support?  How do we transition from old to new?

Programming Models/Software Environment Breakout

  1. What would you do with “smarter” memory?
  2. What is wrong with the other groups? What should they do about it?
  3. How do we deal with existing programming models?  How do we support programming models that current architectures do not support?  How do we transition from old to new?

Applications Breakout

  1. What would you do with “smarter” memory?
  2. What is wrong with the other groups? What should they do about it?
  3. How do we deal with existing code?  How do we support applications that current architectures do not support?  How do we transition from old to new?