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HiPC Workshop
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HiPC Workshop
Reaching Exascale in this Decade

Goa, India


Abstract:

Achieving a thousand-fold increase in supercomputing technology to reach exascale  computing (1018 operations per second) in this decade will revolutionize the way supercomputers are used [1]. Predictive computer simulations will play a critical role in achieving energy security, developing climate change mitigation strategies, lowering CO2 emissions and ensuring national security. Scientific discovery, industrial competitiveness, homeland security and quality of life issues will also greatly benefit from the next leap in supercomputing technology. This dramatic increase in computing power will be driven by a rapid escalation in the parallelism incorporated in microprocessors. The transition from massively parallel architectures to hierarchical systems (hundreds of processor cores per CPU chip) will be as profound and challenging as the change from vector architectures to massively parallel computers that occurred in the early 1990’s. Through a collaborative effort between laboratories and key university and industrial partners, the architectural bottlenecks that limit supercomputer scalability and performance can be overcome. In addition, such an effort will help make petascale computing pervasive by lowering the costs for these systems and dramatically improving their power efficiency.

Applications and system software will need to change as architectures evolve. It is anticipated that clockspeeds will remain near a GigaHertz, requiring billion way parallelism to reach exascale. Scalability of applications, system software and hardware to this level will be a significant challenge. In addition, nodes will become more complex with more cores, threads and scheduling width. Memory access costs will need to be lowered from today’s 150 pJ/bit to a few picojoules per bit. Achieving this goal and obtaining high performance on next generation microprocessors will require applications to manage locality.  Since both hardware and software will change there is an opportunity for co-design, which ahs been identified as a key strategy for reaching exascale [2].

Resilience will be another challenge for hardware and software. The number of nodes in an exascale system will be an order of magnitude greater than many of today’s systems. In addition, keeping node reliability at the same level as today will be a challenge as the number of transistors increases.

It will be important for the international HPC community to converge on a common programming model. Whether it is a unified programming model or MPI plus a node level programming model is an open research question. However, applications will not migrate aggressively to exascale systems without some assurance that the programming model is stable. Programming cost relative to performance gain will also be an important consideration.

Purpose of the Workshop:

An important goal of this workshop is to foster international collaborations in exascale computing. Such partnerships will be necessary in tackling the significant hardware and software challenges including scalability, parallelism, memory, locality, programming models and co-design.  A funding agency panel will discuss opportunities for researchers and the potential to initiate international collaborations.

Structure of the of the Workshop:

An important goal of this workshop is to foster international collaborations in exascale computing. Such partnerships will be necessary in tackling the significant hardware and software challenges including scalability, parallelism, memory, locality, programming models and co-design.  A funding agency panel will discuss opportunities for researchers and the potential to initiate international collaborations.

References:

[1] Alvin, K., Brightwell, R., Dosanjh, S., et al, “On the path to exascale,” International Journal of Distributed Systems and Technologies, Vol. 1, Issue 2, 2010, pp. 1-22.

[2] Geist, A. and Dosanjh, S., “IESP Exascale Challenge: Co-Design of Architectures and Algorithms”, International Journal of High Performance Computing, 2009.

Organizers: Alok Choudhary, Northwestern University and Sudip Dosanjh, Sandia National Laboratories

Sponsors:
National Science Foundation, USA and Electrical Engineering and Computer Science Department, Northwestern University, USA


Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation ,for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-AC04-94AL85000. 

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